|
The iPhone Wiki is no longer updated. Visit this article on The Apple Wiki for current information. |
Difference between revisions of "T8002"
m (corrected grammar) |
|||
| (3 intermediate revisions by 3 users not shown) | |||
| Line 2: | Line 2: | ||
The T8002 features 32-bit ARMv7k architecture. |
The T8002 features 32-bit ARMv7k architecture. |
||
| + | |||
| + | It's also used in first edition of '''iBridge''', AKA the MacBook Pro TouchBar processor. |
||
==Bootrom Exploits== |
==Bootrom Exploits== |
||
| + | [[checkm8 Exploit|checkm8]] |
||
| − | There are no known exploits. |
||
{{stub|hardware}} |
{{stub|hardware}} |
||
Latest revision as of 11:04, 27 June 2020
T8002 refers to the CPU inside of two of Apple's SiPs: the S1P and the S2. The S1P is currently used in the Apple Watch Series 1, while the S2 is used in the Apple Watch Series 2.
The T8002 features 32-bit ARMv7k architecture.
It's also used in first edition of iBridge, AKA the MacBook Pro TouchBar processor.
Bootrom Exploits
|
This hardware article is a "stub", an incomplete page. Please add more content to this article and remove this tag. |
