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Difference between revisions of "T8120"
(Created page with "<!--186px|thumb|The Apple A15 Bionic SoC--> The '''T8120''' is the Apple A16 Bionic SoC. It was unveiled on {{date|2022|09|07}...") |
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| − | + | [[File:A16.jpg|186px|thumb|The Apple A16 Bionic SoC]] |
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The '''T8120''' is the Apple A16 Bionic [[wikipedia:System on a chip|SoC]]. |
The '''T8120''' is the Apple A16 Bionic [[wikipedia:System on a chip|SoC]]. |
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It was unveiled on {{date|2022|09|07}} during the [[Keynotes#2022|'Far out' event]]. |
It was unveiled on {{date|2022|09|07}} during the [[Keynotes#2022|'Far out' event]]. |
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| − | The part number is <code> |
+ | The part number is <code>APL1W10</code>. |
==Specifications== |
==Specifications== |
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'''General''' |
'''General''' |
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*Manufacturer: [[wikipedia:TSMC|TSMC]] |
*Manufacturer: [[wikipedia:TSMC|TSMC]] |
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| − | *Clock rate: up to |
+ | *Clock rate: up to 3.46 GHz |
| − | *Core design: |
+ | *Core design: [[Apple Everest]] x 2 and [[Apple Sawtooth]] x 4 |
*Instruction set: ARMv8.5-A |
*Instruction set: ARMv8.5-A |
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*Architecture: arm64e |
*Architecture: arm64e |
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'''Cache''' |
'''Cache''' |
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| + | * L1 ?KB instruction, ?KB data. |
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| − | * ? |
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| + | * L2 ? MB |
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| − | <!--*L1 128KB instruction, 64KB data. |
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| − | *L2 4 MB--> |
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'''GPU''' |
'''GPU''' |
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| + | * Apple-designed 5-core GPU |
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| − | * ? |
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| − | <!--*Apple-designed 5-core GPU (one core is disabled on iPhone 13 and iPhone 13 mini)--> |
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'''Memory (RAM)''' |
'''Memory (RAM)''' |
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| − | * |
+ | * 6GB |
| − | <!--*4GB <small>(iPad mini (6th generation), iPhone 13 mini and iPhone 13)</small> |
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| − | *6GB <small>(iPhone 13 Pro and iPhone 13 Pro Max)</small>--> |
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==Devices== |
==Devices== |
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==Bootrom== |
==Bootrom== |
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'''Version''' |
'''Version''' |
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| + | * [[Bootrom 7195.0.0.300.25]] |
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| − | * ? |
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'''Vulnerabilities''' |
'''Vulnerabilities''' |
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Latest revision as of 17:22, 20 September 2022
The T8120 is the Apple A16 Bionic SoC.
It was unveiled on 7 September 2022 during the 'Far out' event.
The part number is APL1W10.
Specifications
General
- Manufacturer: TSMC
- Clock rate: up to 3.46 GHz
- Core design: Apple Everest x 2 and Apple Sawtooth x 4
- Instruction set: ARMv8.5-A
- Architecture: arm64e
Cache
- L1 ?KB instruction, ?KB data.
- L2 ? MB
GPU
- Apple-designed 5-core GPU
Memory (RAM)
- 6GB
Devices
Bootrom
Version
Vulnerabilities
- None
